Wednesday 5 September 2012

VHDL Constant


constant Active: Std_logic := '0';
constant SIZE: INTEGER := 16;
constant  ZERO: STD_LOGIC_VECTOR := "0000";


The value can not be changed.


Reference

This blog post contains notes taken when working through the Doulos Pacemaker tutorial.   Any content copied from the tutorial has been reproduced with permission.  http://www.doulos.com.

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