VHDL Configurations

Each component instantiation refers to some design entity (entity/architecture pair) and the association is specified by a configuration specification [2].

entity TEST_MUX4 is
end;

...

architecture BENCH of TEST_MUX4 is

  ...

end;

----
 use WORK.all;
configuration CFG_MUX4 of TEST_MUX4 is
  for BENCH
  end for;
end CFG_MUX4;

Reference
[1] http://www.doulos.com
[2] http://vhdl.renerta.com/mobile/source/vhd00020.htm

This blog post contains notes taken when working through the Doulos Pacemaker tutorial.   Any content copied from the tutorial has been reproduced with permission.  http://www.doulos.com.