Saturday 17 May 2014

Simple Nios II on the DE0-Nano - Part 3 of 4 (VHDL)

In my last port we connected the blocks together to for our Nios System using Qsys that will flash the LEDs on the DE0-Nano development board. This block now needs to be stitched into our FPGA design and VHDL is my weapon of choice.

VHDL




Using the VHDL component templeate from Qsys we can create a simple piece of VHDL to instantiate the component and take the route the IO out to the pins of the device.

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

entity de0nano1 is
  port
  (
   pin_clk    : in  std_logic;
   pin_reset_n: in  std_logic;
   pin_led_pio: out std_logic_vector(7 downto 0)
   );
end entity;

architecture arch_de0nano1 of de0nano1 is

  component my_nios1 is
    port 
    (
    clk_clk                            : in  std_logic := 'X'; 
    reset_reset_n                      : in  std_logic := 'X'; 
    led_pio_external_connection_export : out std_logic_vector
                                                 (7 downto 0) 
      );
  end component my_nios1;
  
begin

  inst_nios: component my_nios1 port map 
    (
      clk_clk                            => pin_clk, 
      reset_reset_n                      => pin_reset_n, 
      led_pio_external_connection_export => pin_led_pio 
    );
 
end architecture arch_de0nano1;

The only other thing we need to do before we place and route the design is assign the pins for the clock, reset and the leds in the DE0-Nano. The following is some TCL that will make the process easy for you.

set_location_assignment PIN_E1 -to pin_reset_n
set_location_assignment PIN_R8 -to pin_clk
set_location_assignment PIN_A15 -to pin_led_pio[0]
set_location_assignment PIN_A13 -to pin_led_pio[1]
set_location_assignment PIN_B13 -to pin_led_pio[2]
set_location_assignment PIN_A11 -to pin_led_pio[3]
set_location_assignment PIN_D1 -to pin_led_pio[4]
set_location_assignment PIN_F3 -to pin_led_pio[5]
set_location_assignment PIN_B1 -to pin_led_pio[6]
set_location_assignment PIN_L3 -to pin_led_pio[7]

Our soft processor is now ready for some software and that what I am going to do in my next port. 




1 comment:

  1. Hi GeoByJmh!
    Good tutorial! It makes me hope to get my Nios II working on my DE0-Nano, finally. Altera's tutorials are all from 2011 and there isn't any SOPC-Builder in the newer Quartus-Versions.
    Great, generating the Nios II with Qsys worked well.
    But on this side - Analysis and Elaboration - brings me Errors:

    "led_pio_external_connection_export[0]" does not exist in macrofunction "inst_nios"
    8 times from [0] to [7]...

    that points to the vhdl-code on this side.
    So the LEDs aren't assigned? I routed them with the pin-planner, but I don't know exactly what to with this TCL. It's already included in a file named de0nano1.qsf.
    I'm using Quartus II 14.1. How can i assign the LED-pins in VHDL?
    Cheers from Germany :)

    ReplyDelete