Simple Nios II on the DE0-Nano - Part 1 of 4 (Project creation)

The DE0-Nano is a small development board based on the Cyclone IV FPGA from Altera. The manufactures of the board claim that it is ideal for use with the soft processor Nios II. In this series of posts I am going to explore how to build one these Nios II's. 

The Architecture

The first thing we need is the Nios II processor. However to be able to run a simple program we need some RAM to store the program in. we also need a method of getting the code out of the PC down into the memory. That's what the Jtag Uart is for. The system ID is will be used to ensure to check that we are developing software for the correct build of the FPGA. If we didn't have a system ID it could get very messy and difficult to get any software running. To create some output I have decided to do nothing more that flash some LED's. To do that I need to include a PIO in output mode only.

This system is built using Qsys. However we need to create a project in Quartus II  before we begin.

First look at Quartus II

I am using Quartus II 12.1 web edition. The following steps will set-up our project. 

The first thing we need to do is create a new project. 

Choose a suitable location and call the project de0nano1

The DE0-Nano uses a Cyclone IV E device part number EP4CE22F17C6 

You can now click Finish we are done with the project Wizard.

In my next post I will describe how to add a Qsys system to this project that implements the architecture we discussed at the start of this post.

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Simple Nios II on the DE0-Nano - Part 1 of 4 (Project creation)

Simple Nios II on the DE0-Nano - Part 2 of 4 (Qsys)

Simple Nios II on the DE0-Nano - Part 3 of 4 (VHDL)

Simple Nios II on the DE0-Nano - Part 4 of 4 (Nios Software)