The following is a simple VHDL testbench called tb_text that is used to demonstrate the print procedure found in the txt_util package. All it does is print a simple message to the transcript window in modelsim.
library ieee;
use ieee.std_logic_1164.all;
library work;
use work.txt_util_pkg.all;
entity tb_text is
end entity;
architecture arch_tb_text of tb_text is
begin
process
begin
print("================================");
print("This is using the print function");
print("xxxx");
print("================================");
wait;
end process;
end architecture;
The output from this VHDL file is as follows:
The VHDL procedure taken from the txt_util package used to implement this print facility is as follows:
variable msg_line: line;
begin
write(msg_line, text);
writeline(output, msg_line);
end print;
References
http://www.stefanvhdl.com/
http://www.stefanvhdl.com/vhdl/vhdl/txt_util.vhd